In recent years, power saving of an electronic device has been demanded in consideration of environmental issues, and the trend to save power has been particularly prominent in an electronic device driven by a battery. Generally, in order to achieve such power saving, reducing the electric power consumed by the electronic device, and improving the efficiency of a power circuit itself and suppressing wasteful electric power consumption are important. A non-isolated switching regulator using an inductor is widely used as a high-efficiency power circuit used for a small electronic device.
There are two major control modes of the switching regulator. A first one is a PWM (Pulse Width Modulation) control mode, in which ratios of ON-time and OFF-time of a switching transistor are changed by maintaining a constant frequency of a pulse signal and changing a duty cycle of the pulse signal, and an average value of an output voltage after smoothing is controlled to be constant. A second one is a VFM (Variable Frequency Modulation) control mode, in which a ratio of an ON-time to a predetermined period of a switching transistor is changed by maintaining a constant pulse duration of a pulse signal and changing a frequency of the pulse signal, and an average value of an output voltage after smoothing is controlled to be constant. In addition, there are two types of the VFM control mode. A first one involves changing a frequency of a pulse signal continuously and a second one involves changing a frequency of a pulse signal pseudoly by dividing a clock pulse signal of the switching regulator in the PWM control mode. The VFM control mode is also described as a PFM (Pulse Frequency Modulation) control mode.
The electric power consumption of the switching regulator itself increases in proportion to a switching frequency. In the PWM control mode, an ON/OFF control of a switching transistor is performed at a constant cycle even in the case of a light load; therefore the efficiency in the case of the light load is degraded. On the other hand, in the VFM control mode, the switching frequency of the switching transistor fluctuates based on a load current; therefore, an influence of noise and a ripple on the device increases, the number of switching times decreases for the light load, and the efficiency becomes better than in the PWM control mode. Thus, conventionally, there is a switching regulator which enhances a power supply efficiency from the case of the light load to a case of a heavy load by performing a switching of a PWM control and a VFM control based on a load condition.
However, because noise occurring from the switching regulator greatly affects a peripheral device, it is necessary to give consideration to such noise. In noise components of the switching regulator, a noise component in the switching frequency of the switching transistor is greatest. In the VFM control mode, a frequency fluctuates based on a load current; therefore the noise component occurring from the switching regulator fluctuates based on the load current. Regarding the above-described noise, the switching regulator needs to be used with consideration of the peripheral device.
In addition, generally, in the case of being controlled in the VFM control mode, a ripple of an output voltage becomes larger than in the case of being controlled in the PWM control mode. Even in the VFM control mode, a maximum switching frequency in the VFM control is inconsistent; therefore in a case where the switching regulator is turned on and energy is supplied to an inductor before an inductor current becomes zero, there is a problem in that the ripple of the output voltage further becomes large.
FIG. 8 is a circuit diagram illustrating a conventional example of a current mode controlled switching regulator which performs a switching of a PWM control and a VFM control.
In FIG. 8, when an electric charge stored in an output capacitor Co is discharged in a load 120 connected to an output terminal OUT, an output voltage Vout gradually falls, and an error voltage opout rises. When the error voltage opout exceeds a second reference voltage Vr2, an enable signal OSCEN, which is an output signal of a comparator 108, inverts and the enable signal OSCEN becomes in a high state. When the enable signal OSCEN becomes in a high state, an oscillation circuit 109 immediately produces one high-state pulse and outputs as a clock signal CLK. An RS flip-flop circuit 105 is set by the clock signal CLK, and an output Q becomes in a high state. And then, a control circuit 106 sets each of control signals PHS and NLS to be in a low state and turns a switching transistor M101 on and a synchronous rectification transistor M102 off.
When the switching transistor M101 is turned on, an input voltage Vin is applied to an inductor L101, and therefore an inductor current iL flows through the inductor L101. An increasing rate of the inductor current iL regarding time is proportional to a voltage difference between the input voltage Vin and the output voltage Vout. When the inductor current iL exceeds an output current iout, the output voltage Vout rises to charge the output capacitor Co, and the error voltage opout falls. When the error voltage opout falls to less than the second reference voltage Vr2, the enable signal OCSEN from the comparator 108 returns to be in a high state. Therefore, the oscillation circuit 109 outputs only one pulse as the clock signal CLK and stops an oscillation operation.
The inductor current iL is converted to an inductor voltage Vsen by an inductor current/voltage converter circuit 110 and outputted. A compensation slope voltage Vs1p outputted from a slope voltage producing circuit 111 is added to the inductor voltage Vsen in an adding circuit 112 and becomes a ramp voltage Vc, and the ramp voltage Vc is inputted to a non-inverting input of a comparator 104. The ramp voltage Vc rises as time goes by, and when the ramp voltage Vc exceeds the error voltage opout, an output signal PWMOUT of the comparator 104 inverts and becomes in a high state. When the output signal PWMOUT becomes in a high state, the RS flip-flop circuit 105 is reset and the output Q becomes in a low state, and the control circuit 106 sets each of the control signals PHS and NLS to be in a high state. Therefore, the switching transistor M101 is turned off and the synchronous rectification transistor M 102 is turned on.
When the switching transistor M101 is turned off, due to an influence of a counter-electromotive force of the inductor L101, a voltage VLX of a connection part LX becomes a negative voltage. Therefore, the inductor voltage Vsen, which is the output voltage of the inductor current/voltage converter circuit 110, falls to a ground voltage GND, and concurrently the slope voltage producing circuit 111 stops operating and the compensation slope voltage Vs1p falls to the ground voltage GND. As a result, the ramp voltage Vc falls to the ground voltage GND, and the output signal PWMOUT of the comparator 104 immediately returns to be in a low state.
When a current value of the inductor current iL falls to less than or equal to the output current iout, the output voltage Vout starts to fall, and when the output voltage Vout falls, the error voltage opout rises. When the error voltage opout exceeds the second reference voltage Vr2, the process returns to the beginning of the above-described explanation and the same operation as described above is performed, and then the operation as described above is repeated.
In the VFM control mode, the smaller the output current iout is, the longer a time for the fall of the output voltage Vout takes; therefore a duration in which the switching transistor M101 is on becomes long, that is, the switching frequency becomes low. In addition, the smaller the output current iout is, the faster the output voltage Vout rises; therefore a fall speed of the error voltage opout becomes fast, and the duration in which the switching transistor M101 is on becomes short. When the output current iout increases, and the switching frequency becomes high, and the error voltage opout becomes always equal to or more than the second reference voltage Vr2, the VFM control mode is automatically switched to the PWM control mode.
In the PWM control mode, the error voltage opout becomes always equal to or more than the second reference voltage Vr2; therefore the enable signal OSCEN, which is the output signal of the comparator 108, becomes in a high state. And then, the oscillation circuit 109 performs an oscillation at a predetermined frequency and produces and outputs a clock signal CLK. When the clock signal CLK becomes in a high state, the RS flip-flop circuit 105 is set and the output Q becomes in a high state. And then, the switching transistor M101 is turned on, and the synchronous rectification transistor M102 is turned off and the inductor current iL flows. The inductor current iL is converted to the inductor voltage Vsen in the inductor current/voltage converter circuit 110, and the compensation slope voltage Vs1p is added and the ramp voltage Vc is produced and then the ramp voltage Vc is inputted to the non-inverting input of the comparator 104.
When the ramp voltage Vc exceeds the error voltage opout, the output signal from the comparator 104 becomes in a high state, and the RS flip-flop circuit 105 is reset. And then, the control circuit 106 sets each of the control signals PHS and NLS to be in a high state, and turns the switching transistor M101 off and the synchronous rectification transistor M102 on. As a result, the ramp voltage vc falls to the ground voltage GND, and the output signal PWMOUT returns to be in a low state. The inductor current iL continues flowing via the synchronous rectification transistor M102, and before the inductor current iL becomes zero, the clock signal CLK becomes in a high state again, and the operation as described above is repeated. In the PWM control mode, the larger the output current iout becomes, the longer the ON-time of the switching transistor M101 becomes.
However, the conventional switching regulator as described in FIG. 8 is not capable of controlling a maximum switching frequency in the VFM control mode, and as described as a waveform diagram of FIG. 9, depending on a setting of a circuit parameter, equal to or more than 2 times of switching is performed in one period of a switching cycle in the PWM control mode. Therefore, the maximum switching frequency in the VFM control mode becomes larger than a switching frequency in the PWM control mode, and there is a problem such that it is necessary to make consideration for noise which is equal to or more than the switching frequency in the PWM control mode. In addition, there is a problem such that a ripple of the output voltage Vout becomes large, because the switching transistor M101 is turned on and energy is supplied to the inductor L101 before the inductor current iL becomes zero.
Consequently, a conventional step-down switching regulator of a fixed frequency type is capable of setting a maximum oscillation frequency (for example, see Japanese patent application publication No. H10-225105). However, as an oscillator always operates, a consumption current increases and this prevents the efficiency from improving. And additionally, a step-down switching regulator of a variable frequency type has a problem such that it is not capable of setting the maximum switching frequency in the VFM control mode as well as the switching regulator of FIG. 8.